Tue, 23 November, 2021
In one of our previous news posts, we explained about Silicon Photonics and how this technology allows realising miniature optical sensors on a chip. We also discussed the challenges in getting light in/out of the chip. Here we explain a solution using microlenses, which we fabricate on the back side of the chip. In the schematic below, we summarise the differences between the microlens approach and the common approach where the readout is done using single mode optical fibres aligned above the grating couplers.
The advantage of using microlenses is twofold. First, the readout can be done from the bottom side of the chip so that the top side is not obstructed for sensing. Second, the beam diameter between the microlens and the readout system is larger (e.g. 40 µm compared to 10 µm diameter when reading out with fibres). A larger, or so-called expanded-beam interface, allows a more relaxed tolerance in lateral positioning of the chip with respect to the readout. This facilitates assembling of the chips with the readout system, or allows realising pluggable chip-to-reader implementations. The latter is interesting for biosensing or chemical sensing where the readout system is expensive, but the sensor chip is cheap and disposable.
IMEC developed this microlens technology for applications in telecommunication* or spectral sensing in the MID-infrared+ and will now further advance this technology for the SEER sensors. For more information on the optical design, specifications, and test results, we refer to our publications on this topic (1,2,3). Below, we will explain the fabrication process and will show some examples of fabricated microlenses.
A first step is to translate application requirements into a properly optimised design. Then, we polish the back side of the chip and on the exact location where the microlens eventually should be placed, we realise cylindrical structures in a material called photoresist. These photoresist cylinders have a certain diameter (typically 0.2 mm) and thickness (typically 0.01 mm). This is done as a so-called post-processing step, after all the structures on the top side (also called “device side”) of the chip have already been realised. Therefore, to avoid damaging the already made structures on the device side, we apply a protection layer. Afterwards, we heat up the chip, thereby also heating up the photoresist cylinders. This will cause them to melt and “reflow” into a spherically shaped surface. The radius of curvature of this spherical surface is one of its most important properties and it is directly linked with the thickness and diameter of the initial cylinder. Thus, by tuning these two parameters, we can obtain the exact lens curvature as dictated by our design. Finally, we transfer the photoresist lens into the substrate material (i.e. silicon) using a reactive ion etching step. This is done to obtain a fully monolithic solution, which is minimally affected by changing environmental conditions. By tuning the etching process, we make sure that the photoresist material and the silicon etches at the same rate, which will result in a 1:1 transfer of the resist lens into the silicon. To guarantee good optical performance of the microlenses, it is important that these lenses have very smooth, low-roughness surface. To further improve the coupling efficiency, an anti-reflection coating can be added on the lenses.
On the SEM micrograph below, you can see microlenses in photoresist, after the reflow process.
On the microscope image below, you can see a top view of lenses, after they have been transferred to the silicon substrate.
The SEER project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No 871875.
*1) http://hdl.handle.net/1854/LU-8699614
2) http://hdl.handle.net/1854/LU-8653488
+3) http://hdl.handle.net/1854/LU-8673740